====== 資訊 ======
# cat /proc/cpuinfo
<code>
system type             : Broadcom BCM4710 chip rev 0
processor               : 0
cpu model               : BCM4710 V0.0
BogoMIPS                : 82.94
wait instruction        : no
microsecond timers      : yes
tlb_entries             : 32
extra interrupt vector  : no
hardware watchpoint     : no
VCED exceptions         : not available
VCEI exceptions         : not available
</code>
# cat /proc/meminfo
<code>
        total:    used:    free:  shared: buffers:  cached:
Mem:  14688256 12636160  2052096        0   528384  3538944
Swap:        0        0        0
MemTotal:        14344 kB
MemFree:          2004 kB
MemShared:           0 kB
Buffers:           516 kB
Cached:           3456 kB
SwapCached:          0 kB
Active:           2968 kB
Inactive:         1024 kB
HighTotal:           0 kB
HighFree:            0 kB
LowTotal:        14344 kB
LowFree:          2004 kB
SwapTotal:           0 kB
SwapFree:            0 kB
</code>
$ lspci
<code>
00:00.0 RAM memory: Broadcom Corporation Unknown device 0803
00:01.0 Ethernet controller: Broadcom Corporation BCM47xx Sentry5 iLine32 HomePNA 2.0
00:02.0 Ethernet controller: Broadcom Corporation Sentry5 Ethernet Controller
00:03.0 Modem: Broadcom Corporation BCM47xx V.92 56k modem
00:04.0 USB Controller: Broadcom Corporation Sentry5 USB Controller
00:05.0 PCI bridge: Broadcom Corporation Sentry5 PCI Bridge
00:06.0 MIPS: Broadcom Corporation Sentry5 MIPS32 CPU
00:07.0 FLASH memory: Broadcom Corporation Sentry5 External Interface Core
00:08.0 Ethernet controller: Broadcom Corporation Sentry5 Ethernet Controller
01:00.0 Host bridge: Broadcom Corporation BCM4710 Sentry5 PCI to SB Bridge (rev 01)
01:01.0 Mass storage controller: Promise Technology, Inc. PDC20265 (FastTrak100 Lite/Ultra100) (rev 02)
01:02.0 Network controller: Broadcom Corporation BCM4306 802.11b/g Wireless LAN Controller (rev 03)
</code>

====== 改機 ======
===== UART =====
  - [[http://nuwiki.openwrt.org/oldwiki/OpenWrtDocs/Customizing/Hardware/UART|Adding a UART to some BCM4702KPB-based boards]]
===== 記憶體 =====
  - [[http://wl500g.info/showthread.php?t=14297|WL-HDD sdram from 16 to 32MB]]
===== 第二組USB =====
  - [[http://oldwiki.openwrt.org/OpenWrtDocs%282f%29Hardware%282f%29Asus%282f%29WL%282d%29HDD%282f%29usb_mod.html|Second USB Port]]
===== 其他 =====
  - [[http://digiland.tw/viewtopic.php?id=293|WL-HDD 改機筆記]]